Why sign-and-magnitude falls short
The obvious way to represent a negative number is to reserve one bit for the sign and use the rest for magnitude — but that scheme produces two different bit patterns for zero (+0 and −0) and forces an adder to branch on the sign bits before it can decide whether to add or subtract. Digital hardware needs a representation where addition just works, regardless of sign.
Two's complement
Two's complement solves this: to negate an N-bit number, invert every bit and add 1. For 4 bits, this gives a range of −8 to +7, with a single representation of zero.
- Example: +3 is 0011. Invert to get 1100, then add 1: 1101 is −3.
- The top bit still acts like a sign bit (0 for non-negative, 1 for negative), but ordinary binary addition on two's-complement numbers produces the correct result automatically, carries and all.
Subtraction as addition
Because negation is just invert-and-add-1, A − B becomes A + (¬B) + 1 — exactly a full adder chain with B's bits inverted and the very first carry-in tied to 1 instead of 0. This is why real ALUs rarely contain a separate subtractor circuit: the same adder hardware handles both operations, switched by one control signal that XORs every bit of B and feeds that same signal into the initial carry-in.
Try it in Boolflow
Build a 4-bit adder in the circuit editor, place a XOR gate in front of each B input with a shared control line, and tie that same control line into the first carry-in. Toggle the control line and confirm with the Truth Table tool that the circuit computes A+B when it's 0 and A−B when it's 1.