State plus rules

A finite state machine is any sequential circuit built from exactly two parts: a state register — flip-flops holding which of a finite number of states the machine is currently in — and combinational logic that computes the next state (and the output) from the current state and the current inputs. Every clock edge, the next-state logic's output is latched into the register, becoming the new current state.

Moore machines: outputs depend on state alone

In a Moore machine, the output is a function of the current state only — never directly of the inputs. This means the output can only change on a clock edge, one cycle after whatever input triggered the state change, but it also means the output is glitch-free: nothing an input does between clock edges can cause it to flicker.

Mealy machines: outputs depend on state and input

A Mealy machine's output is a function of both the current state and the current input, so it can react within the same clock cycle the input changes — often letting the same task be done with fewer states. The trade-off is that a glitch on an input can briefly glitch the output too, since there's no flip-flop between the input and the output logic.

A counter is the simplest Moore machine

Boolflow's 4-bit counter block already is a Moore machine — its state is the count value, and its output is that same state with no separate output logic at all. To build a custom FSM, pair a REG4 as the state register with a PLM block (or ordinary gates) computing next-state and output from the register's current value, and wire the PLM's output back into the register's input in the circuit editor.