What an ALU does
An Arithmetic-Logic Unit (ALU) is the part of a processor that actually computes — it takes two operands and an opcode, and produces one of several possible results (AND, OR, ADD, SUB, etc.) depending on what the opcode selects. Every CPU instruction that does arithmetic or comparison routes through some form of ALU.
Building blocks: adder and logic gates
Most of an ALU's functions are already covered by circuits from the other articles: a full adder (or a chain of them) computes ADD, and the same adder computes SUB if one operand is first complemented (inverted and incremented — two's complement negation). AND and OR operations are simply the bitwise AND/OR gates applied directly to the two operand buses.
Selecting the operation with a multiplexer
Since an ALU needs to produce one of several results depending on the opcode, every candidate result (AND, OR, ADD, SUB...) is computed in parallel by separate sub-circuits, and a multiplexer selects which one actually reaches the output, driven by the opcode bits.
- opcode = 00 → output = A AND B
- opcode = 01 → output = A OR B
- opcode = 10 → output = A + B (adder)
- opcode = 11 → output = A − B (adder with inverted B and Cin=1)
A 1-bit ALU walkthrough
Boolflow's built-in 1-bit ALU block is exactly this structure: an AND gate, an OR gate, and a full adder (configurable for add or subtract by inverting one input) all feed a 4-to-1 multiplexer, with the 2-bit opcode driving the select lines. Changing the opcode while keeping A and B fixed instantly shows all four possible results without rewiring anything.
Scaling up to N bits
Chaining N 1-bit ALU slices together — the same way full adders chain into an N-bit adder — produces a full N-bit ALU, which is the arithmetic core of a simple CPU. Load the 1-bit ALU example in Boolflow, toggle the opcode bits, and verify each result against a truth table before exporting the design to Verilog or VHDL.