Karnaugh Maps for Circuit Simplification
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Karnaugh Maps for Circuit Simplification

7 min

Why minimize at all?

A Boolean expression derived directly from a truth table (the Sum-of-Products form) is always correct, but rarely minimal. Fewer literals and fewer terms mean fewer gates, less propagation delay, and lower power consumption — which matters a lot once a circuit is replicated millions of times on a chip.

How a Karnaugh map works

A Karnaugh map (K-map) arranges every row of a truth table into a grid where adjacent cells differ by exactly one bit. This layout means that any group of 2, 4, 8... adjacent 1s can be combined into a single, simpler product term, because the bit that changes between them simply disappears from the expression.

  • Draw the grid: 2 variables → 2×2, 3 variables → 2×4, 4 variables → 4×4.
  • Fill in 1s and 0s from the truth table, using Gray-code ordering on the axes so that neighbours always differ by one bit.
  • Circle the largest possible rectangular groups of 1s (sizes must be powers of 2).
  • Each circled group becomes one term in the simplified expression; the OR of all the terms is your answer.

A small example

For a 2-input function where the output is 1 for A=0,B=1 and A=1,B=1 (rows 01 and 11), both cells share B=1 and differ only in A. Circling them together eliminates A entirely, leaving the simplified expression: F = B.

From map to circuit

Once you have the minimized expression, wire it up directly in Boolflow with the corresponding AND/OR/NOT gates. Use the Truth Table tool to double-check the simplified circuit still matches the original specification before exporting to Verilog, VHDL, or C++.

Check your simplification against a truth table