Why go serial at all
Sending a 4-bit (or wider) word over several separate wires works fine on one board, but becomes expensive and unreliable over any real distance. Serial communication instead sends the same word one bit at a time over a single wire, trading wires for time — exactly what a shift register is built to do.
Framing a word with start and stop bits
The receiver has no independent way to know when a new word begins, so a UART frame wraps the data in markers: an idle line sits at 1, a start bit (a single 0) announces that data follows, the data bits shift out one per clock, and a stop bit (a 1) marks the end and returns the line to idle. An edge detector watching for the 1-to-0 transition on an idle line is exactly what tells a receiver a start bit has arrived.
Transmitter and receiver
A transmitter keeps the word in a register and puts its bits on the wire one per clock, with the start and stop bits added at either end. With Boolflow's parts the neat way to do that is a counter stepping the select inputs of a MUX4: the REG4 supplies the four data bits and the counter chooses which one reaches the output on this clock. A receiver runs the reverse: an edge detector catches the start bit, a small counter times out the right number of clocks while each data bit is shifted in through the SI input of a SHIFT4 (a serial-in, parallel-out register), and once the count finishes the assembled word is read out in parallel from Q0–Q3. The newest bit always enters at Q0, so the first bit to arrive ends up in Q3.
Try it yourself
Build a transmitter in the circuit editor from a REG4 holding the word (give it a clock pulse of its own first), a MUX4 whose inputs I0–I3 come from the REG4, and a CNT4 whose Q0 and Q1 drive the MUX4 selects S0 and S1. Put a PROBE on the MUX4 output and run the CLOCK: the word comes out one bit per tick, least significant bit first. Then send that wire into the SI input of a SHIFT4 on the same CLOCK, and after four ticks its outputs hold the word again, in reverse order — bit 0 sits in Q3.