The problem: circuits outgrow one canvas

A handful of gates fit comfortably on one screen; a 4-bit ALU or a hand-built state machine already starts to sprawl, and wiring every block directly to every other block on a single flat canvas quickly produces more crossing wires than logic.

Layers and VIA links

Boolflow lets a circuit span multiple layers, with VIA elements acting as a named cross-layer connection: a signal driven into a VIA on one layer reappears at every other VIA sharing that same name on any layer, without an explicit wire ever being drawn between them. This is purely a viewing convenience, not a separate scoping mechanism — a VIA-connected signal behaves exactly like a directly wired one; it's still one flat circuit, just laid out across more than one visible sheet.

Grouping with Frames and Labels

A Frame draws a visual boundary and caption around a group of elements — useful for marking 'this cluster of gates is the carry logic' or 'this is register bank 2' — purely as documentation for whoever reads the circuit later, since it changes nothing about how the enclosed elements simulate. A Label element similarly just names a point in the circuit for readability, with no effect on simulation at all.

Practical layout

Put closely-related logic — an ALU's opcode-select multiplexer and its four candidate operations, for instance — on one layer inside a labeled Frame, and use VIA links named after the signal they carry (CARRY_OUT, OPCODE_1, and so on) to cross to whichever layer needs that signal next, instead of routing one long wire across the whole canvas. See the Help reference for the full VIA and Frame element reference.